In digital integrated circuits with metal-oxide semiconductor (MOS) transistors, normally-off enhancement mode devices should be used. Because of the positive surface state charge of an oxidized silicon surface, P-channel MOS transistors are of the enhancement mode. For the same reason, N-channel MOS transistors are likely to be of the normally-on depletion mode unless a low resistivity substrate (high concentration greater than 2 .times. 10.sup.16 atoms/cm.sup.3) and/or a reverse-biased source-to-substrate junction is used. A substrate of low resistivity lowers the drain breakdown voltage and increases the threshold voltage; while a reverse-biased substrate necessitates an additional power supply as well as an additional terminal. Furthermore, a highly doped P-type substrate of low resistivity results in increased drain-to-source capacitance and reduced operational speed. Thys, it is desirable to fabricate enhancement made N-channel MOS transistors with low background concentration and without reverse biasing the source-to-substrate junction. Such transistors have higher operational speed due to the lower drain-source capacitance and higher drain breakdown voltage which permits high driving voltages.